Method of manufacturing semiconductor device
US9431245B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Jul 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device includes generating a mask layout of patterns in which the distance between adjacent ones of the patterns is equal to or less than a resolution of a lithography process, the patterns are apportioned among a plurality of masks such that in each of the masks the space between adjacent ones of the patterns is greater than the resolution, and a dual pattern is added to one of the masks. A semiconductor pattern is formed on a substrate using the mask(s) and the mask to which the dual pattern has been added. Patterns having a pitch equal to or less than the resolution may be formed on the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.