Patent · US Active

Vertical memory devices and methods of manufacturing the same

US9431414B2 · kind B2 · utility

79Cited by
0References
12Claims
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Key dates

Filing dateOct 17, 2014
Grant dateAug 30, 2016
Priority date
Expiry dateNov 19, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/693

Abstract

Nonvolatile memory devices include at least four cylindrical-shaped channel regions, which extend vertically from portions of a substrate located at respective vertices of at least one rhomboid when viewed in a vertical direction relative to a surface of the substrate. A charge storage layer (e.g., ONO layer) is provided on an outer sidewall of each of the cylindrical-shaped channel regions. In addition, to achieve a high degree of integration, a plurality of vertically-stacked gate electrodes are provided, which extend adjacent each of the cylindrical-shaped channel regions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.