Vertical-type nonvolatile memory device and method of manufacturing the same
US9431416B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Oct 28, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A vertical-type nonvolatile memory device includes a first vertical channel structure, and first and second stacked structure. The first vertical channel structure extends vertically on a substrate. The first stacked structure includes gate electrodes and first interlayer insulating layers. The gate layers and the first interlayer insulating layers are alternately and vertically stacked on each other. The first stacked structure is disposed on a first sidewall of the first vertical channel structure. The second stacked structure includes first sacrificial layers and second interlayer insulating layers. The first sacrificial layers and the second interlayer insulating layers are alternately and vertically stacked on each other. The second stacked structure is disposed on a second sidewall of the first vertical channel structure. The first sacrificial layers is formed of a polysilicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.