System and method for fabricating high voltage power MOSFET
US9431532B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 3, 2015 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Sep 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
A high voltage power MOSFET includes a semiconductor substrate doped by a first conducting type, a source doped by a second conducting type and over the semiconductor substrate, and a drain region doped by the second conducting type and on the semiconductor substrate. One or more drain layers doped by the second conducting type and on the semiconductor substrate span between the body region and the drain region. An insulating layer is formed on at least a portion of the body region and over the one or more drain layers. A voltage regulating layer on the insulating layer can produce voltage distributions in the one or more drain layers to deplete charge carriers to increase blockage voltage in an off state, and to accumulate charge carriers in an on state to reduce on-state resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.