Reduced-power dissipation for circuits handling differential pseudo-differential signals
US9431971B2 · kind B2 · utility
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9References
23Claims
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Key dates
| Filing date | Jun 13, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Jun 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45112
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an example, a differential amplifier is disclosed that is configured to realize low noise with decreased overall system current. The differential amplifier may include a first amplifier stage and a second amplifier stage arranged in series, wherein a pull-up current iH flowing as a single bias current iB=iH flows into the first stage. A single pull-down current iT sources to ground from the second stage, wherein iH=iT=iB substantially. In certain embodiments, the transconductance of the second stage may be increased by providing two transconductors coupled at their base nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.