Circuitry useful for clock generation and distribution
US9432013B2 · kind B2 · utility
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13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Aug 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F2017/0073
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprising an inductor arrangement, the arrangement comprising: four inductors adjacently located in a group and arranged to define two rows and two columns, wherein: the integrated circuit is configured to cause two of those inductors diagonally opposite from one another in the arrangement to produce an electromagnetic field having a first phase, and to cause the other two of those inductors to produce an electromagnetic field having a second phase, the first and second phases being substantially in antiphase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.