Bus reversable orthogonal differential vector signaling codes
US9432082B2 · kind B2 · utility
95Cited by
121References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2015 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Jul 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0668
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Properties and the construction method of Orthogonal Differential Vector Signaling Codes are disclosed which are tolerant of order-reversal, as may occur when physical routing of communications channel wires causes the bus signal order to be reversed. Operation using the described codes with such bus-reversed signals can avoid complete logical or physical re-ordering of received signals or other significant duplication of receiver resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.