Multi-bit magnetic memory cell
US9435867B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2015 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Oct 20, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/5607
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus includes a first Hall sensor having a first terminal, a second terminal, a third terminal and a fourth terminal and a second Hall sensor having a fifth terminal, a sixth terminal, a seventh terminal and an eighth terminal. A conductor connects the third terminal to the fifth terminal. A processor is configured to measure a first potential between the fourth terminal and the sixth terminal while transferring a first current from the first terminal to the seventh terminal via the conductor, to measure a second potential between the first terminal and the seventh terminal while transferring a second current from the fourth terminal to the sixth terminal via the conductor, and to determine a resultant voltage generated by the first and second Hall sensors in response to the first and second potentials.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.