Pixel array
US9436046B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2013 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Nov 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A pixel array includes multiple scan lines, multiple gate lines, multiple data lines and multiple pixel structures. The scan lines are disposed on a substrate. The gate lines intersect with the scan lines to demarcate multiple first unit regions and multiple second unit regions. Each gate line electrically connects to one of the scan lines. The data lines intersect with the scan lines and pass through the first unit regions. Each data line is located between two adjacent gate lines. The pixel structures are disposed on the first unit regions. Each pixel structure includes an active device and a pixel electrode. The active device is driven by one corresponding scan line and connects with one corresponding data line. An orthographic projection of each pixel electrode on the substrate is non-overlapped with or incompletely overlapped with an orthographic projection of the corresponding gate lines on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.