Patent · US Active

Fast platform hibernation and resumption of computing systems

US9436251B2 · kind B2 · utility

1Cited by
16References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 1, 2011
Grant dateSep 6, 2016
Priority date
Expiry dateSep 10, 2032

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Fast platform hibernation and resumption for computing systems. An embodiment of an apparatus includes a volatile system memory, a nonvolatile memory, and a processor to operate according to an operating system, the processor to transition the apparatus to a first reduced power state upon receipt of a request, the transition to the first reduced power state including the processor to store context information for the computer in the volatile system memory. The apparatus further includes logic to transition the apparatus to a second reduced power state, the logic to copy the context data from the volatile system memory to the nonvolatile memory for the transition to the second reduced power state, where copying of the context data includes the logic to scan the volatile system memory to locate non-active memory elements in the volatile system memory, eliminate the non-active memory elements from the volatile system memory to generate compressed context data, and store the compressed context data in the nonvolatile memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.