Array substrate and fabrication method thereof, and display device
US9437487B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2014 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Dec 18, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Embodiments of the disclosure disclose an array substrate and a fabrication method thereof, and a display device. The fabrication method of the array substrate comprises: forming a thin film transistor; forming a passivation layer covering the thin film transistor, the passivation layer having a via hole and the via hole exposing at least a portion of a drain electrode of the thin film transistor; forming a via-hole conductive layer, the via-hole conductive layer covering the portion of the drain electrode exposed at the via hole and connected to the drain electrode; treating the via-hole conductive layer, so that a reflectivity of the via-hole conductive layer is lower than a reflectivity of the drain electrode; and forming a pixel electrode, the pixel electrode being connected with the drain electrode through the via-hole conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.