Thin film transistor, manufacturing method thereof and array substrate
US9437742B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 27, 2013 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Sep 27, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thin film transistor, a manufacturing method thereof and an array substrate are provided. The thin film transistor includes: a gate electrode (102) formed on a substrate (101), a gate insulating layer (103) formed on the gate electrode (102) and covering at least a part of the substrate (101), and a semiconductor layer (105′), a source electrode (107a) and a drain electrode (107b) which are formed on the gate insulating layer (103). The material of the semiconductor layer (105′) is an oxide semiconductor; and the material of the source electrode (107a) and drain electrode (107b) is the oxide semiconductor which is doped. The source electrode (107a), the drain electrode (107b) and the semiconductor layer (105′) are disposed in the same layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.