Compensation time computing method and device for clock difference
US9438216B2 · kind B2 · utility
0Cited by
3References
12Claims
0Family size
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Key dates
| Filing date | Dec 11, 2014 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Dec 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for computing compensation time for clock difference between a first chip and a second chip. The method comprises emitting, by the second chip, a pulse with a fixed pulse length to the first chip; measuring, by the first chip, a pulse length of the pulse; computing the compensation time according to the measure pulse length and the fixed pulse length; and setting the compensation time to the second chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.