Gate driver and related circuit buffer
US9438235B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 14, 2014 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Feb 12, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0291
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit buffer for outputting a voltage signal having a magnitude greater than a withstand voltage of any circuit element in the circuit buffer includes a first transistor and a second transistor. The first transistor includes a first terminal and a second terminal electrically connected to an input terminal and an output terminal of the circuit buffer respectively, a third terminal electrically connected to a first power supply terminal, and a fourth terminal electrically connected to the third terminal of the first transistor. The second transistor includes a first terminal and a second terminal electrically connected to the input terminal and the output terminal of the circuit buffer respectively, a third terminal electrically connected to a second power supply terminal, and a fourth terminal electrically connected to the third terminal of the second transistor. Voltages of the first and second power supply terminal are switched between two different levels, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.