Programmable logic circuit and nonvolatile FPGA
US9438243B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2015 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Dec 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1776
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic circuit includes: first to third wiring lines, the second wiring lines intersecting with the first wiring lines; and cells provided in intersecting areas, at least one of cells including a first transistor and a programmable device with a first and second terminals, the first terminal connecting to one of a source and a drain of the first transistor, the second terminal being connected to one of the second wiring lines, the other of the source and the drain being connected to one of the first wiring lines, and a gate of the first transistor being connected to one of the third wiring lines. One of source and drain of each of the first cut-off transistors is connected to the one of the second wiring lines, and an input terminal of each of first CMOS inverters is connected to the other of the source and the drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.