Video processing system with shared/configurable in-loop filter data buffer architecture and related video processing method thereof
US9438911B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2013 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Jun 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/423
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A video processing system includes a data buffer and a storage controller. The data buffer is shared between a plurality of in-loop filters, wherein not all of the in-loop filters comply with a same video standard. The storage controller controls data access of the data buffer, wherein for each in-loop filter granted to access the data buffer, the data buffer stores a partial data of a picture processed by the in-loop filter. Another video processing system includes a storage device and a storage controller. The storage controller adaptively determines a size of a storage space according to a tile partition setting of a picture to be processed by an in-loop filter, and controls the storage device to allocate the storage space to serve as a data buffer for storing data of the in-loop filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.