Dynamic processor core switching

US9442758B1 · kind B1 · utility

Assignee

• Marvell International Ltd. · BM

Inventors

• Premanand Sakarda · Acton, US
• Scott B. Peirce · Forestdale, US
• Jia Bao · Shanghai, CN
• Marlon Moncrieffe · Leominster, US
• Priya Vaidya · Shrewsbury, US
• Michael Rosenzweig · Hopkinton, US
• Minda Zhang · Mesa, US
• Palanisamy Mohanraj · Chandler, US

Key dates

• Filing date: Jan 21, 2009
• Grant date: Sep 13, 2016
• Expiry date: Feb 7, 2031

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B60L2220/46
• WIPO field: Transport
• WIPO sector: Mechanical engineering

Abstract

Dynamic processor core switching is described. In embodiments, a multi-core processor system can include a first processor core that executes computer instructions at a first processing rate, and can include at least a second processor core that executes the computer instructions at a second processing rate, where the second processing rate is different than the first processing rate. A core profiler can generate system profile data that is evaluated to determine when a core-switch manager initiates switching execution of the computer instructions from the first processor core to the second processor core while the computer instructions are being executed.