Robust hardware/software error recovery system
US9442793B2 · kind B2 · utility
2Cited by
6References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2014 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Dec 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/86
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for error detection and recovery is provided in which a host controller and host software collaborate together. The host controller may: detect an error condition, set an error interrupt or register, and/or halt task execution or processing at the host controller. The host software may: detect an error condition as a result of the host controller having set the error interrupt or register; performs error handling, and clears the error condition. The host controller then resumes execution or processing of tasks upon detecting that error condition has been cleared by the host software.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.