Increased destaging efficiency by smoothing destaging between current and desired number of destage tasks
US9442847B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2012 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Oct 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/462
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for increased destaging efficiency by smoothing destaging tasks to reduce long input/output (I/O) read operations are described. A system may comprise a processor device operable in the computing storage environment. The processor device calculates a current number of the destaging tasks and calculates a desired number of the destaging tasks. The processor device smoothes the destaging of the of the destaging tasks between the desired number of the destaging tasks and the current number of the destaging tasks by accelerating the calculating of the current number of the destaging tasks and the desired number of the destaging tasks, according to either a time interval or a variable recomputed destaging task interval, for reaching the desired number of the destaging tasks by decrementing the current number of destaging tasks or incrementing the current number of destaging tasks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.