Increased destaging efficiency by smoothing destaging between current and desired number of destage tasks
US9442848B2 · kind B2 · utility
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6Claims
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Key dates
| Filing date | Jun 29, 2012 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | May 19, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/462
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for increased destaging efficiency by smoothing destaging tasks to reduce long input/output (I/O) read operations are described. A method may comprise a processor device operable in the computing storage environment. The processor device destages tasks are calculated according to one of a standard time interval and a variable recomputed destaging task interval. The destaging of storage tracks between a desired number of destaging tasks and a current number of destaging tasks is smoothed according to the calculating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.