Method of controlling erase operation of a memory and memory system implementing the same
US9443599B2 · kind B2 · utility
5Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2015 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Apr 6, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory and a method of controlling an erase operation of the non-volatile memory using a controller are provided. The method of controlling the erase operation includes beginning performance of the erase operation, monitoring a next command to be performed in the non-volatile memory while performing the erase operation, determining an erase status, and continuing, suspending or canceling the erase operation based on the determination result of the erase status.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.