Process for forming gate of thin film transistor devices
US9443740B1 · kind B1 · utility
1Cited by
5References
22Claims
0Family size
Inventors
Key dates
| Filing date | May 15, 2015 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | May 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a T-gate with enhanced mechanical strength and a reduced gate length for high electron mobility transistors is provided. The process includes the steps of forming a stem portion cavity with rounded top edges to enhance the mechanical strength, creating an insoluble diffused feature shrinking layer to reduce the gate length, carrying out a thermal flow process to further reduce the gate length, and forming a head portion cavity with negative side wall slopes to facilitate lift-off of gate metal layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.