Integrated circuit devices with source/drain regions including multiple segments
US9443852B2 · kind B2 · utility
3Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2015 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Feb 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
Integrated circuit devices with source/drain regions including multiple segments and methods of forming the same are provided. The integrated circuit devices may include a gate structure on a substrate and a source/drain region in the substrate adjacent the gate structure. The source/drain region may include a sidewall including a plurality of curved sidewall sections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.