Integration of Viterbi algorithm with decision feedback equalization
US9444581B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2014 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Dec 4, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/006
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A modified Viterbi algorithm, that integrates decision feedback equalization (DFE), is disclosed. The modified algorithm may be used especially for rate ½ coded transmissions through additive noise channels, where the additive noise is one-tap filtered noise. Each state in the presently-disclosed trellis holds an aggregate error and an aggregate weight of the winner path terminating at that state. Each branch of the trellis carries one or more aggregate errors, where each of the aggregate errors includes a contribution from the aggregate error of the branch's source state as well as a contribution from the difference between an expected symbol of the branch and a corresponding received symbol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.