Voltage mode transmitter
US9444659B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 17, 2015 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Apr 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/085
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A voltage mode transmitter includes a resistive network and a de-emphasis value controller. The resistive network receives plural input voltages and provides plural weighting values corresponding to respective input voltages. A sum of the products of the plural input voltages and the corresponding weighting values is equal to an output voltage. The de-emphasis value controller receives a first signal. After the first signal is inverted as an inverted first signal and the inverted first signal is delayed for a time period, the de-emphasis value controller generates a second signal. The de-emphasis value controller further receives a value control signal. At least one of the plural input signals is provided by the first signal and at least one of the plural input signals is provided by the second signal according to the value control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.