Circuit and method for identifying exception cases in a floating-point unit and graphics processing unit employing the same
US9448806B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2012 |
| Grant date | Sep 20, 2016 |
| Priority date | — |
| Expiry date | Oct 17, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A floating-point unit and a method of identifying exception cases in a floating-point unit. In one embodiment, the floating-point unit includes: (1) a floating-point computation circuit having a normal path and an exception path and operable to execute an operation on an operand and (2) a decision circuit associated with the normal path and the exception path and configured to employ a flush-to-zero mode of the floating-point unit to determine which one of the normal path and the exception path is appropriate for carrying out the operation on the operand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.