Patent · US Active

Closed-loop testing of integrated circuit card payment terminals

US9449320B1 · kind B1 · utility

18Cited by
5References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 8, 2015
Grant dateSep 20, 2016
Priority date
Expiry dateJun 8, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06Q20/40
  • WIPO fieldIT methods for management
  • WIPO sectorElectrical engineering

Abstract

Technologies for closed-looped testing of integrated circuit card payment terminals include loading a test profile onto an integrated circuit payment card. Authorization request and response messages are locally generated and translated to simulate acquirer processor processing and payment network processing. An outcome report indicative of the outcome of the test transaction is generated and transmitted to a remote certification server. Other embodiments are described and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.