Methods of operating and forming semiconductor devices including dual-gate electrode structures
US9449677B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2014 |
| Grant date | Sep 20, 2016 |
| Priority date | — |
| Expiry date | May 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device may include a semiconductor substrate with first and second spaced apart source/drain regions defining a channel region therebetween and a control gate structure on the channel region between the first and second spaced apart source/drain regions. More particularly, the control gate structure may include a first gate electrode on the channel region adjacent the first source/drain region, and a second gate electrode on the channel region adjacent the second source/drain region. Moreover, the first and second gate electrodes may be electrically isolated. Related devices, structures, methods of operation, and methods of fabrication are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.