Nonvolatile memory and erasing method thereof
US9449699B2 · kind B2 · utility
4Cited by
2References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2016 |
| Grant date | Sep 20, 2016 |
| Priority date | — |
| Expiry date | Jan 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.