Equalizer for high speed serial data links and method of initialization
US9450788B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2015 |
| Grant date | Sep 20, 2016 |
| Priority date | — |
| Expiry date | May 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03159
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method for calculating optimal equalizer coefficients during an initialization phase is disclosed. An equalizer system for processing a received signal at a communications receiver comprises several equalizers and adaptation modules. A first equalizer is configured to receive and process a received signal to create a first equalizer output. The first equalizer is active during an initialization phase and active during an operational phase. A second equalizer is configured to receive and process the first equalizer output to create a second equalizer output. The second equalizer is active during an initialization phase and aids in the generation of the first equalizer coefficients, and inactive during an operation phase. A third equalizer is configured to receive and process the first equalizer output to create a third equalizer output such that the third equalizer is inactive during an initialization phase and active during an operation phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.