Phase-locked loop frequency calibration method and system
US9455854B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2015 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | Jun 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0331
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention provides a phase-locked loop frequency calibration method and system, where the method includes: performing, within a counting time TCNT[k], frequency counting on a frequency signal that is output in a current working subband by a voltage-controlled oscillator, to obtain a frequency count value FCNT[k], where the current working subband corresponds to a binary value of a current node in a binary search tree; and calculating an error between FCNT[k] and a target frequency count value FCNTTARGET[k], comparing an absolute value of the error with a predetermined value, dynamically adjusting TCNT[k] in a value range of TCNT[k] according to a comparison result, and determining, in combination with a binary search algorithm, a target subband in which the voltage-controlled oscillator works. Such a dynamic calibration method can effectively shorten the calibration time on the whole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.