Patent · US Active

Techniques for entering a low power state

US9459683B2 · kind B2 · utility

0Cited by

0References

22Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Leena K. Puthiyedath · Beaverton, US
Anil Aggarwal · Portland, US
Qingda Lu · Bellevue, US
Rahul Seth · Los Angeles, US
Michael Walz · Friedberg, DE

Key dates

Filing date	Sep 27, 2013
Grant date	Oct 4, 2016
Priority date	—
Expiry date	Jun 6, 2034

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D30/50
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various embodiments are generally directed to an apparatus, method and other techniques for initiating a transition into a lower power state, determining that a device process prevents a platform processing device from completing the transition to the lower power state and interrupting a processing component from an intermediate power state in order to process the process prior to execution of a defined event.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.