Method and device for controlling a sample and hold circuit
US9460808B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2014 |
| Grant date | Oct 4, 2016 |
| Priority date | — |
| Expiry date | Nov 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0231
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for controlling a sample and hold circuit that includes a switching module coupled to a storage capacitor. A circuit external to the sample and hold circuit of generates at least one main current representative of at least one leakage current of the switching module in its off state. The at least one main current is delivered to at least one auxiliary capacitor. An initial pulse signal is generated from the charging and discharging of the at least one auxiliary capacitor. The sampling phase of the sample and hold circuit is triggered at the rate of the pulses of a pulse signal derived from the initial pulse signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.