Junction field effect transistor, integrated circuit for switching power supply, and switching power supply
US9461115B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2012 |
| Grant date | Oct 4, 2016 |
| Priority date | — |
| Expiry date | Aug 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/87
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.