Electronic component embedded substrate and manufacturing method thereof
US9462697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2013 |
| Grant date | Oct 4, 2016 |
| Priority date | — |
| Expiry date | Jan 25, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to an electronic component embedded substrate including: a first insulating layer including a cavity; an electronic component inserted in the cavity; a first metal pattern formed on a lower surface of the first insulating layer to mount the electronic component thereon and including at least one guide hole for exposing a portion of the external electrode; a second insulating layer formed on the lower surface of the first insulating layer to cover the first metal pattern; a first circuit pattern formed on a lower surface of the second insulating layer; and a first via for electrically connecting the first external electrode exposed through the guide hole and the first circuit pattern, and can improve electrical connectivity between the external electrode and the via even when the size of the external electrode of the electronic component is reduced than before.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.