Bridge circuit to arbitrate bus commands
US9465754B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2013 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Dec 2, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit may include a queue, a monitor, and a controller. The queue may receive and store a plurality of commands from a plurality of buses to access a shared set of registers. The monitor may monitor the plurality of commands in the queue to determine whether a period of time needs to be reserved for selected commands from one of the plurality of buses. The controller, if the period of time needs to be reserved, based on the period of time determined by the monitor, may disable acceptance of commands from buses other than the one of the plurality of buses, may execute the selected commands for the one of the plurality of buses, and may allow more than one of the plurality of buses access to results of the selected commands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.