Patent · US Active

Method and apparatus for delivering MSI-X interrupts through non-transparent bridges to computing resources in PCI-express clusters

US9465760B2 · kind B2 · utility

18Cited by
1References
18Claims
0Family size

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Key dates

Filing dateNov 18, 2013
Grant dateOct 11, 2016
Priority date
Expiry dateSep 1, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0026
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus for initialization. The apparatus includes a management I/O device controller for managing initialization of a plurality of I/O devices coupled to a PCI-Express (PCIe) fabric. The management I/O device controller is configured for receiving a request to register a target interrupt register address of a first worker computing resource, wherein the target interrupt register address is associated with a first interrupt generated by a first I/O device coupled to the PCIe fabric. A mapping module of the management I/O device controller is configured for mapping the target interrupt register address to a mapped interrupt register address of a domain in which the first I/O device resides. A translating interrupt register table includes a plurality of mapped interrupt register addresses in the domain that is associated with a plurality of target interrupt register addresses of a plurality of worker computing resources.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.