Partial merge
US9465829B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Aug 1, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/283
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-level storage architecture and method of performing a partial merge are disclosed. A main store is partitioned into a passive main part and an active main part, the active main part being empty at a start of the partial merge, the passive main part storing encoded data records of the main store that are not subject to the partial merge. A values index corresponding to a sorted dictionary of the passive main part is set to a cardinality of n. The data records of a second level storage structure is merged into the active main part, the active main part having a dictionary that starts with a value of n+1, such that the merging into the active main part continues an encoding scheme according to the values index of the passive main part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.