Laminated ceramic capacitor
US9466426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2013 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Feb 26, 2033 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC04B2237/588
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Provided is a laminated ceramic capacitor which can suppress degradation of the insulation resistance due to the addition of vanadium. Second insulating layers are stacked on both sides in the stacking direction of a first insulating layer group, which has first insulating layers stacked over one another, and internal electrodes are placed on principal surfaces of the first insulating layers. At least one internal electrode is placed between the first and second insulating layers. Both contain, as their main constituent, a perovskite-type compound represented by the formula “ABO3” wherein “A” denotes at least one of Ba, Sr, and Ca, “B” denotes at least one of Ti, Zr, and Hf. V is added to only the first insulating layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.