Semiconductor device and method for fabricating the same
US9466730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2014 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Jan 17, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/665
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a semiconductor device, including: a substrate of a first conductivity type having an active region and a termination region; an epitaxial layer of the first conductivity type over the substrate; a plurality of first trenches and second trenches in the epitaxial layer; an implant blocker layer formed at bottoms of the first and second trenches; a liner of a second conductivity type different from the first conductivity type conformally formed along sidewalls of the first and second trenches; a dielectric material filled in the first and second trenches defining a plurality of first columns and a plurality second column, respectively; a gate dielectric layer over the epitaxial layer; two floating gates formed on the gate dielectric layer; a source region; an inter-layer dielectric layer; and a contact plug formed on the source region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.