Digital current equalizing device, analog current equalizing device, current equalizing method and system
US9467041B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2013 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | Sep 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/0009
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Provided are a digital current equalizing device, an analog current equalizing device, a current equalizing method and a system. The digital current equalizing device comprises: an output current sampling amplifying module (102), a digital processing module (104), and a main power frequency conversion module (106). An input terminal of the output current sampling amplifying module (102) connects to an output loop of a power supply, and an output terminal of the output current sampling amplifying module (102) connects to a current equalizing bus through a resistor R0, wherein the digital processing module (104) is configured to adjust an output voltage reference signal Vr according to a difference between an output voltage signal V2 of the output current sampling amplifying module (102) and an voltage signal Vbus of the current equalizing bus, and the main power frequency conversion module (106) is controlled to adjust the voltage according to the adjusted output voltage reference signal Vr′. The technical solution is easy to implement and can improve the reliabilities of each power supply module and the whole power supply system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.