Quadrature current-combining linearizing circuit for generating arbitrary phase and amplitude
US9467196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2014 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | May 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/485
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A device includes a first circuit path coupled to a first node and a second node, the first circuit path having at least one first varactor circuit configured to receive a first tuning voltage, the first circuit path having a resistor with a selectable value, and a second circuit path coupled to the first node and the second node, the second circuit path having at least one second varactor circuit configured to receive a second tuning voltage, the second circuit path having a capacitor with a selectable value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.