Early de-allocation of write buffer in an SSD
US9471242B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 20, 2015 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Oct 20, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage system includes: non-volatile solid state memory including non-volatile storage units and a temporary register; a data storage controller configured to receive a write command including a plurality of logical segments of data from a host; a write buffer allocated to receive a portion of the plurality of logical segments of data and accumulate a physical segment of data corresponding to a write unit of the solid state memory; a solid state memory controller configured to transmit the accumulated data from the write buffer to the temporary storage register each time the write buffer accumulates a physical segment of data. The data storage controller acknowledges completion of the write command to the host after the last logical segment of data is written to the write buffer; and deallocates the write buffer after the solid state memory completes reception of the accumulated data into the temporary storage register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.