Graphics processing systems
US9472018B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2011 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Apr 17, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2210/62
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a tile-based graphics processing system, when an overlay image is to be rendered onto an existing image, the existing tile data for the existing image from the frame buffer in the main memory is pre-loaded into the local color buffer of the graphics processor (step 41). The overlay content is then rendered and used to modify the tile data stored in the color buffer (step 44). When the data for a given sampling position stored in the tile buffer is modified as a result of the overlay image, a corresponding dirty bit for the tile region that the sampling position falls within is set (step 45). Then, when all the rendering for the tile has been completed, the dirty bits are examined to determine which regions of the tile have been modified (step 46). The modified tile regions are written back to the output image in the frame buffer in the main memory (step 47), but any regions whose dirty bits have not been set are not written back to the frame buffer in the main memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.