Devices and method of adjusting synchronization signal preventing tearing and flicker
US9472133B2 · kind B2 · utility
4Cited by
0References
23Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 13, 2012 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Dec 6, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2370/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display controller includes a synchronization signal adjusting circuit, which adjusts at least one of the delay and the pulse width of a synchronization signal generated in a display driver and outputs an adjusted synchronization signal, and a transmission timing control circuit configured to control the transmission timing of display data, which will be transmitted to the display driver, in response to the adjusted synchronization signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.