Clock synchronization for multichannel system
US9472203B1 · kind B1 · utility
199Cited by
1References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 29, 2015 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Jun 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R2420/07
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An acoustic echo cancellation (AEC) system that detects and compensates for differences in sample rates between the AEC system and a set of wireless speakers based on a search-based trial-and-error technique. The system individually determines a frequency offset for each microphone-speaker pair using an iterative process, determining an echo-return loss enhancement (ERLE) value for each offset that is tried, and selecting the frequency offset associated with the largest ERLE value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.