Methods for characterizing shallow semiconductor junctions
US9472474B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 16, 2014 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Jan 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The disclosed technology generally relates to methods of characterizing semiconductor materials, and more particularly to methods of characterizing shallow semiconductor junctions. In one aspect, the method of characterizing shallow semiconductor junctions comprises providing a substrate comprising a shallow junction formed at a first main surface, where the shallow junction is formed substantially parallel to the first main surface. The method additionally comprises providing a dielectric layer on the first main surface. The method additionally comprises iterating, at least twice, a combination of processes including providing a respective charge on a predetermined area of the dielectric layer via a charge applicator, and measuring a corresponding junction photovoltage for the predetermined area. The method further comprises deriving at least one of an average hole/electron mobility or a dose of active dopants in the substrate corresponding to the predetermined area, based on the respective charges and the corresponding junction photo voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.