Cobalt interconnect techniques
US9472502B1 · kind B1 · utility
13Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2015 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Jul 14, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53209
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments relate to a method of manufacturing an integrated circuit device. In this method a dielectric layer is formed over a substrate. The dielectric layer comprises an opening arranged within the dielectric layer. A first cobalt liner is formed along bottom and sidewall surfaces of the opening. A barrier liner is formed on exposed surfaces of the first cobalt liner. A bulk cobalt layer is formed in the opening and over the barrier liner to fill a remaining space of the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.