Transistor gate having an insulating layer support structure
US9472633B1 · kind B1 · utility
3Cited by
5References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2011 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Dec 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments include but are not limited to apparatuses and systems including a microelectronic device including a gate, a source pad and a drain pad arranged such that the gate is separated from the source pad and the drain pad by air, and an insulating layer coupled with a portion of the gate such that at least a portion of the insulating layer is separated from the source pad and the drain pad by the air. Methods for making the same also are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.