Armature-clad MRAM device
US9472749B2 · kind B2 · utility
3Cited by
7References
13Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Mar 20, 2014 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Aug 1, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
Abstract
A magnetoresistive memory cell includes a magnetoresistive tunnel junction stack and a dielectric encapsulation layer covering sidewall portions of the stack and being opened over a top of the stack. A conductor is formed in contact with a top portion of the stack and covering the encapsulation layer. A magnetic liner encapsulates the conductor and is gapped apart from the encapsulating layer covering the sidewall portions of the stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.